Change Log

This file lists all important changes to ATS9130 Firmware

[6.08] - 2021-08-29

• Fixed bug that caused acquisition to stall in NPT mode if non-zero pre-trigger data was selected.

[6.07] - 2021-08-07

• Fixed bug that caused intermittent stalling of data capture in single-port emulation mode. This bug did not affect dual-port DMA.

[6.05] - 2021-06-21

• Added NPT Footer functionality to ATS9130.

[5.14] - 2019-12-09

• Fixed bug in FIFO Overflow logic that was causing overflows to not be reported.

• Added Slow External Clock support by connecting the signal to the correct place in the logic.

• Added special feature that allows user to capture one sample per external trigger by setting REG_06[31..30] = '11'.

• Added "open floodgates" at the end of acquisition if USE_FPGA_FIFO is '1'.

[5.07] - 2018-11-26

• Initial release.